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8: Coprocessor Interface
ARM720T CORE CPU MANUAL EPSON 8-3
8.2 Coprocessor interface signals
The signals used to interface the ARM720T core to a coprocessor are grouped into four
categories.
The clock and clock control signals include the main processor clock and bus reset:
•HCLK
•EXTCPCLKEN
• HRESETn.
The pipeline-following signals are:
•CPnMREQ
• CPnTRANS
•CPnOPC
• CPTBIT.
The handshake signals are:
•CPnCPI
•EXTCPA
•EXTCPB.
The data signals are:
•EXTCPDIN[31:0]
• EXTCPDOUT[31:0]
• EXTCPDBE.
These signals and their use are described in:
•
Pipeline-following signals
on page 8-4
•
Coprocessor interface handshaking
on page 8-5
•
Connecting coprocessors
on page 8-9
•
Not using an external coprocessor
on page 8-10
•
Undefined instructions
on page 8-10
•
Privileged instructions
on page 8-10