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32 Language Dictionary
*SRE
Meaning and Type
Service Request Enable Device Interface
Description
This command sets the condition of the Service Request Enable Register. This register determines which bits from the
Status Byte Register (see *STB for its bit configuration) are allowed to set the Master Status Summary (MSS) bit and the
Request for Service (RQS) summary bit. A 1 in any Service Request Enable Register bit position enables the corresponding
Status Byte Register bit and all such enabled bits then are logically ORed to cause Bit 6 of the Status Byte Register to be set.
See "Chapter 4 - Status Reporting" for more details concerning this process.
When the controller conducts a serial poll in response to SRQ, the RQS bit is cleared, but the MSS bit is not. When *SRE
is cleared (by programming it with 0), the power supply cannot generate an SRQ to the controller.
Command Syntax *SRE <NRf>
Parameters 0-to 255
Default Value (See *PSC)
Example *SRE 20
Query Syntax *SRE?
Returned Parameters <NR1> (Register binary value)
Related Commands *ESE *ESR *PSC
If *PSC is programmed to 0, then the *SRE command causes a write cycle to nonvolatile memory.
The nonvolatile memory has a finite number of write cycles (see Supplemental Characteristics in the
power supply Operating Guide). Programs that repeatedly write to nonvolatile memory can
eventually exceed the maximum number of write cycles and may cause the memory to fail.
*STB?
Meaning and Type
Status Byte Device Status
Description
This query reads the Status Byte register, which contains the status summary bits and the Output Queue MAV bit. Reading
the Status Byte register does not clear it. The input summary bits are cleared when the appropriate event registers are read
(see "Chapter 4 - Status Reporting" for more information). The MAV bit is cleared at power on or by *CLS.
A serial poll also returns the value of the Status Byte register, except that bit 6 returns. Request for Service (RQS) instead
of Master Status Summary (MSS). A serial poll clears RQS, but not MSS. When MSS is set, it indicates that the power
supply has one or more reasons for requesting service.
Bit Configuration of Status Byte Register
Bit Position
7 6 5 4 3 2 1 0
Condition
OPER
MSS (RQS)
1
ESB MAV QUES
2
2
2
Bit Weight
128 64 32 16 8 4 2 1
ESB = Event status byte summary; MAV = Message available; MSS = Master status summary;
OPER = Operation status summary; QUES = Questionable status summary; RQS = Request for service.
1
Also represents RQS.
2
These bits are always zero.
Query Syntax *STB?
Returned Parameters <NR1> (Register binary value)
Related Commands (None)