HP (Hewlett-Packard) 16500C Sander User Manual


 
After the serial poll is completed, the RQS bit in the Status Byte Register of
the HP 16500C Logic Analysis System will be reset if it was set. Once a bit in
the Status Byte Register is set, it will remain set until the status is cleared
with a *CLS command, or the instrument is reset.
Parallel Poll
Parallel poll is a controller-initiated operation which is used to obtain
information from several devices simultaneously. When a controller initiates
a Parallel Poll, each device returns a Status Bit via one of the DIO data lines.
Device DIO assignments are made by the controller using the PPC (Parallel
Poll Configure) sequence. Devices respond either individually, each on a
separate DIO line; collectively on a single DIO line; or any combination of
these two ways. When responding collectively, the result is a logical AND
(True High) or logical OR (True Low) of the groups of status bits.
Figure 7-3 shows the Parallel Poll Data Structure. The summary bit is sent in
response to a Parallel Poll. This summary bit is the "IST" (individual status)
local message.
The Parallel Poll Enable Register determines which events are summarized in
the IST. The *PRE command is used to write to the enable register and the
*PRE? query is used to read the register. The *IST? query can be used to
read the IST without doing a parallel poll.
Status Reporting
Parallel Poll
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