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Appendix E: Performance Verification
VX4801 Programmable Digital I/O Module
A–29
ibwrt "r;m135ih024oh;L024d00;t135i"
ibwrt "i*"
ibrd 100
(Observe: response of 00FF00FF00FF)
b. Repeat the above test, this time with the even bytes set as inputs and the
odd bytes set as tri-stated outputs. Perform an input of all bytes and
verify that the even bytes are in tri-state mode and not driving the even
byte inputs (even inputs not pulled low):
ibwrt "r;m024ih135oh;L135d00;t024i"
ibwrt "i*"
ibrd 100
(Observe: response of FF00FF00FF00)
3. Verify the external tri-state signals with the following steps:
a. Set up the Slave VX4801 to disable the external tri-state signals (ETS0 -
ETS5) to the VX4801 device-under-test:
set slave
ibwrt "r;m0oh;L0dFF;t0i"
b. Set up the VX4801-device-under-test for odd bytes to be inputs, for even
bytes to be outputs with a Load Output value of 00, and for internal
tri-state to be inactive for all bytes. Read all bytes and verify the 00
output value on all bytes (internal tri-state inactive):
set VX4801
ibwrt "r;m135ih024oh;L024d00;t*i"
ibwrt "i*"
ibrd 100
(Observe: response of 000000000000)
c. Set the Slave to assert the external tri-state signals to the even bytes of
the VX4801 and verify a response of 00FF00FF00FF:
set slave
ibwrt "L0daa"
ibwrt "i*"
set VX4801