Theory of Operation
TDS 310, TDS 320 & TDS 350 Service Manual
3Ć5
Buffer
Amp
Sampler A/D
Time Base
Controller
Acquisition
Memory
Trigger
Logic
Analog
Trigger
CPU
Amplifier
Amplifier
Option
Boards
CPU Bus
Ext Trig/10
External Trigger
AC Line
Attenuator
Attenuator
CH 2
CH 1
Sampler Driver
(U204)
Daculator
Serial
Gain
Offset
Gain
Offset
Display
Time
Interpolator
5 4
4
31
6
2
2
2
Probe
Coding
5
4
74
Figure 3Ć3:ăAcquisition System Block Diagram
Sampler Driver A1Ă
2
Ċ The output of the attenuator drives the sampler
driver inputs. The sampler driver provides gain amplification, bandwidth limit
filters, and outputs for the sampler and trigger signal paths.
The CPU controls the sampler driver bandwidth limit.
The sampler driver is an integrated circuit containing a differential input. The
sampler driver has a differential signal gain of 14X and a singleĆended
trigger signal gain of 2X.
Sampler A1Ă
5
Ċ The sampler provides two acquisition channels. It
contains analog acquisition memory and a heater circuit to provide
temperature stabilization.
START/STOP tells the sampler when to start and stop acquiring data.
ACQINIT tells the sampler to prepare for a new acquisition.
Buffer Amp Ċ The buffer amp converts the differential output signal of the
sampler to a single ended signal for use by the A/D converter.
A/D Converter A1Ă
4
Ċ The A/D converter (U403) converts CH 1 and
CH 2 analog samples from the sampler to 8 bit digital values. The A/D
reference voltage is "1.0 V.
