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Chapter 2 65
Troubleshooting
Identifying LCD-Indicated Conditions
OFF CBE2 IO BD PCI SERR#; OV A PCI device asserted SERR# multiple
times.
OFF CBE3 IO BD Unknown PCI err Unknown PCI error detected.
OFF CBE6 SYS BD AtoE rope perr Parity error between system I/O controller
and Rope-to-PCI bridge.
OFF CBE7 IO BD R2PCI intrnl err Rope-to-PCI bridge internal data error.
OFF CBE8 SYS BD AtoE rope perr Command parity error between system
I/O controller and Rope-to-PCI bridge.
OFF CBE9 IO BD Unknown Rope err Unknown rope error occurred.
FLT CBF0 SYS BD HPMC initiated A High-Priority Machine Check entered
the firmware HPMC handler.
FLT CBF1 SYS BD no OS HPMC IVA There is no HPMC vector for the
operating system. Firmware will halt the
CPU, requiring a power cycle to recover.
FLT CBF2 SYS BD bad OS HPMC len The size of the operating system HPMC
handler is invalid. Firmware will halt the
CPU, requiring a power cycle to recover.
FLT CBF3 SYS BD bad OS HPMC addr The operating system HPMC handler
vector is invalid. Firmware will halt the
CPU, requiring a power cycle to recover.
FLT CBF4 SYS BD bad OS HPMC cksm The operating system HPMC handler
failed the checksum test. Firmware will
halt the CPU, requiring a power cycle to
recover.
FLT CBF5 SYS BD OS HPMC vector 0 The size of the operating system HPMC
handler is zero. Firmware will halt the
CPU, requiring a power cycle to recover.
WRN CBFA SYS BD prev HPMC logged Firmware detected unread PIM data from
a previous HPMC and will overwrite it.
FLT CBFB SYS BD brnch to OS HPMC Branching to the operating system HPMC
handler.
FLT CBFC SYS BD OS HPMC br err Branch to the operating system HPMC
handler failed. Firmware will halt the
CPU, requiring a power cycle to recover.
FLT CBFD SYS BD unknown check The firmware trap handler didn’t detect
an HPMC, LPMC, or TOC.
FLT CBFE SYS BD HPMC during TOC A High-Priority Machine Check occurred
during Transfer of Control processing.
Table 2-1. Chassis Codes for J6000 Workstations
Ostat Code FRU Message Description