Filter
Top Products
Status Reporting 7
Agilent InfiniiVision 5000 Series Oscilloscopes Programmer's Reference 511
The status register bits are described in more detail in the following
tables:
• "Status Byte Register (STB)" on page 81
• "Standard Event Status Register (ESR)" on page 68
• "Operation Status Condition Register" on page 107
• "Operation Status Event Register" on page 109
• "Overload Event Register (OVLR)" on page 113
• "Hardware Event Condition Register" on page 100
• "Hardware Event Event Register" on page 102
The status registers picture above shows how the different status reporting
data structures work together. To make it possible for any of the Standard
Event Status Register bits to generate a summary bit, the bits must be
enabled. These bits are enabled by using the *ESE common command to
set the corresponding bit in the Standard Event Status Enable Register.
To generate a service request (SRQ) interrupt to an external controller, at
least one bit in the Status Byte Register must be enabled. These bits are
enabled by using the *SRE common command to set the corresponding bit
in the Service Request Enable Register. These enabled bits can then set
RQS and MSS (bit 6) in the Status Byte Register.