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Verifying the System Clock
This procedure is provided as a troubleshooting aid to verify that the 100 MHz System Clock oscillator is
functioning properly. The 100 MHz oscillator is the primary time reference used for all of the acquisition
clock periods. The test limits provided are the test limits for the 100 MHz oscillator only. If the readings
are outside of the test limits, the oscilloscope module will not operate properly.
Equipment Required Critical Specification
Recommended
Model/Part Number
Frequency Counter
Oscilloscope
Cable
> 100 MHz, 50 Ω
Bandwidth ≥ 100 MHz, Real Time
50 Ω BNC (m to m) 48-inch
HP 5315A Option 003
HP 54502A
HP 10503A
Procedure:
1. Connect the BNC cable from the AC CAL OUTPUT connector on the rear panel of the HP 16532A
oscilloscope module to the input of the frequency counter.
2. On the HP 16532A oscilloscope module, set the following parameters, in the order given.
Menu Selection Setting
Channel
Trigger
Calibration
s/Div
Auto-Trig
Mode
Procedure
Signal
1 ns
Off
Service Cal
Osc Out
Sample Clk
3. Select RUN-REPETITIVE. Observe the frequency displayed on the frequency counter and verify
that it is 100 MHz ± 0.005%.
4. Disconnect the BNC cable from the frequency counter and connect the cable to the input of the
HP 54502A Oscilloscope.
HP 16532A - Service
6-11