HP (Hewlett-Packard) 53A Welder User Manual


 
Using the Scan Complete Bit
You can use the Scan Complete Bit (bit 8) in the SCPI Operation Status
Register to determine when a scanning cycle completes (no other bits in the
register apply to the switchbox). Bit 8 has a decimal value of 256 and you
can read it directly with the
STAT:OPER? command (refer to the
STATus:OPERation[:EVENt]? command in Chapter 5 for an example).
Note that this is not the same register as the multiplexer Status/Control
Register.
When enabled by the
STAT:OPER:ENAB 256 command, the Scan Complete
Bit will be reported as bit 7 of the Status Register. Use the HP-IB Serial
Poll or the IEEE 488.2 Common Command
*STB? to read the Status
Register. When bit 7 of the status Register is enabled by the
*SRE 128
Common Command to assert an HP-IB Service Request (SRQ), you can
interrupt the controller when the Scan Complete Bit is set, after a scanning
cycle completes. This allows the controller to do other operations while the
scanning cycle is in progress.
The following example monitors bit 7 in the Status Register to determine
when the scanning cycle completes. The computer used in the example is
an HP Series 200/300 used with HP BASIC as the program language. The
computer interfaces with the mainframe over HP-IB. The HP-IB select
code is 7, the HP-IB primary address is 09, and the HP-IB secondary
address is 14.
Example: Scan
Complete Monitor
10 OUTPUT 70914;"*CLS" !Clear all switchbox status
structure
20 OUTPUT 70914;"STAT:OPER:ENAB 256"
!Enable Scan Complete Bit to set
bit 7 in Status Register
30 OUTPUT 70914;"*SRE 128" !Enable bit 7 of Status Register to
assert SRQ
40 OUTPUT 70914;"TRIG:SOUR EXT" !Set to external trigger mode
50 OUTPUT 70914;"SCAN (@100:115)"!Select channels to be scanned
60 OUTPUT 70914;"INIT" !Start scanning cycle
70 WHILE NOT BIT (SPOLL(70914),7) !Waiting for scan complete
80 PRINT "DO OTHER OPERATION HERE"
!Enter program lines for computer
to do other operations
90 END WHILE
100 PRINT "INTERRUPT GENERATED" !Program goes to this line after
interrupt is generated by a
completed scanning cycle
110 END
52 Understanding the HP E1351A/53A FET Multiplexer Modules Chapter 4