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1-8
TDS5000B Series Specifications and Performance Verification
Table 1-2: Channel input and vert ical specifications (Cont.)
Characteristic Description
Analog Bandwidt h Limit
Low frequency, AC coupled 50 Ω: <200 kHz
1MΩ: <10 Hz, reduced by a factor of ten when using a
10X probe
High frequency, typical 20 MHz: with 20 MHz bandwidth limit turned on
150 MHz: with 150 MHz bandwidth limit turned on
Calculated rise time, typical DC 50 Ω coupling, bandwidt h limit set to Full
SCALE range Rise time
TDS5032B, TDS5034B 1mV/divto1.99mV/div 2.67 ns
2mV/divto4.98mV/div 1.6 ns
5mV/divto1V/div 1.15 ns
TDS5052B, TDS5054B,
TDS5054BE
1mV/divto1.99mV/div 2.29 ns
2mV/divto4.98mV/div 1.33 ns
5mV/divto1V/div 800 ps
TDS5104B 1mV/divto1.99mV/div 2.29 ns
2mV/divto1V/div 300 ps
Step response settling errors,
t
i
l
Bandwidth limit set to Full
t
y
pi
c
a
l
SCALE range
Settling error at time after
step
≤2 V st ep am plitude 1 mV/di v to 99.5 mV/div 20 ns: ≤0.5%
100 ns: ≤0.2%
20 ms: ≤0.1%
≤20 V step amplitude 100 mV/div to 1.0 V/div 20 ns: ≤1.0%
100 ns: ≤0.5%
20 ms: ≤0.2%
≤200 V step amplitude 1.01 V/div to 10 V/div 20 ns: ≤1.0%
100 ns: ≤0.5%
20 ms: ≤0.2%
Position range ±5 divisions