SPI-4.2 Lite v4.3 User Guide www.xilinx.com 11
UG181 June 27, 2008
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Preface
About This Guide
This user guide describes the function and operation of the Xilinx LogiCORE™ IP SPI-4.2
(PL4) Lite core, and provides information about designing, customizing, and
implementing the core.
Contents
This guide contains the following chapters:
• Preface, “About this Guide” describes the organization and purpose of the user guide
and the conventions used in this document.
• Chapter 1, “Introduction” introduces the SPI-4.2 Lite core and provides related
information, including recommended design experience, additional resources,
technical support, and submitting feedback to Xilinx.
• Chapter 2, “Core Architecture” describes the SPI-4.2 Lite core architecture and
interface signals.
• Chapter 3, “Generating the Core” describes how to generate the SPI-4.2 Lite core
using the Xilinx CORE Generator™.
• Chapter 4, “Designing with the Core” describes how to use the Xilinx SPI-4.2 Lite core
in a user application.
• Chapter 5, “Constraining the Core” describes how to constrain the core.
• Chapter 6, “Special Design Considerations” describes how to instantiate multiple SPI-
4.2 Lite cores in a design.
• Chapter 7, “Simulating and Implementing the Core” instructs you how to simulate
and implement the SPI-4.2 Lite core in their design.
• Appendix A, “SPI-4.2 Lite Control Word” defines the SPI-4.2 control word format.
• Appendix B, “SPI-4.2 Lite Calendar Programming” contains examples that describe
how to program calendars for the Source Status FIFO and Sink Status FIFO of the SPI-
4.2 Lite core.
• Appendix C, “SPI-4.2 Lite Core Verification” describes the software verification of the
SPI-4.2 Lite core.