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80 www.xilinx.com SPI-4.2 Lite v4.3 User Guide
UG181 June 27, 2008
Chapter 4: Designing with the Core
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Table 4-7: SPI-4.2 Control Word Mapping to 32-bit Interface
Control Word
Associated SPI-4.2 Lite Control Word
bits on TDat
(Qualified by TCtl=1)
Associated Source FIFO Signal(s)
Start of Packet (SOP) TDat[15] =1, TDat[12]=1,
TDat[11:4] <== SrcFFAddr[7:0]
SrcFFSOP, SrcFFAddr[7:0]
New Burst
(address change without SOP)
TDat[15] = 1, TDat[12] = 0,
TDat[11:4] <== SrcFFAddr[7:0]
SrcFFAddr[7:0]
End of Packet
(EOP, even bytes valid)
TDat[14:13] = 10 SrcFFEOP, SrcFFMOD[1:0]
When TDat[14:13] = 10:
MOD = 10 if data bits 31–16 have valid data
MOD =00 if data bits 31–0 have valid data
End of Packet
(EOP, odd bytes valid)
TDat[14:13] = 11 SrcFFEOP & SrcFFMod[1:0]
When TDat[14:13] = 11:
MOD = 11 if data bits 31–8 have valid data
MOD = 01 if data bits 31–24 have valid data
End of Packet
(EOP, abort, error condition)
TDat[14:13] = 01 SrcFFErr, SrcFFEOP,
SrcFFMOD[1:0]