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SPI-4.2 Lite v4.3 User Guide www.xilinx.com
UG181 June 27, 2008
Chapter 2: Core Architecture
Table 2-1: Sink SPI-4.2 Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 2-2: Sink Control and Status Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 2-3: Sink FIFO Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 2-4: Sink Calendar Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 2-5: Sink Status FIFO Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 2-6: Sink Static Configuration Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 2-7: Sink Core Clocks: Embedded Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 2-8: Sink Core Clocks: Status Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 2-9: Sink Core Clocks: User Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 2-10: Source SPI-4.2 Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 2-11: Source Control and Status Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 2-12: Source FIFO Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 2-13: Source Calendar Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 2-14: Source Status FIFO Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 2-15: Source Static Configuration Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 2-16: Source Core Clocks: Master Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 2-17: Source Core Clock Status Signals: Master Configuration . . . . . . . . . . . . . . . . 40
Table 2-18: Source Core Clocks: Slave Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Chapter 3: Generating the Core
Chapter 4: Designing with the Core
Table 4-1: Formatting SPI-4.2 Interface Data (RDat) 64-bit User Interface (Example) . . 56
Table 4-2: SPI-4.2 Control Word Mapping to 64-bit User Interface . . . . . . . . . . . . . . . . . . 57
Table 4-3: SPI-4.2 Control Word Mapping to 32-bit User Interface . . . . . . . . . . . . . . . . . . 57
Table 4-4: Status Written into SnkStat per Channel per Write Cycle. . . . . . . . . . . . . . . . . 65
Table 4-5: Status Written to Status FIFO Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 4-6: Example of Formatting Source FIFO Data for a 64-bit User Interface. . . . . . . 79
Table 4-7: SPI-4.2 Control Word Mapping to 32-bit Interface . . . . . . . . . . . . . . . . . . . . . . . 80
Table 4-8: SPI-4.2 Control Word Mapping to 64-bit User Interface . . . . . . . . . . . . . . . . . . 81
Table 4-9: Status Written into SrcStat per Channel per Clock Cycle . . . . . . . . . . . . . . . . . 89
Table 4-10: Status Read Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 4-11: Status for the 256-channel Source Calendar Initialization System . . . . . . . . 92
Chapter 6: Special Design Considerations
Table 6-1: Sink Core Embedded Clocking Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Table 6-2: Sink Core User Clocking Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Schedule of Tables