Xilinx UG181 Welder User Manual


 
SPI-4.2 Lite v4.3 User Guide www.xilinx.com 59
UG181 June 27, 2008
Sink Core
R
SnkBusErrStat[5]: Control word with payload bit not set and non-zero address
(excluding Training Control word).
SnkBusErrStat[7:6]: Tied to zero. (reserved)
If the core receives two (or more) back-to-back payload control words, the last one
received is used and the others are discarded. If the core receives two (or more) EOPs
back-to-back, the first one is used and the others are discarded. For more information
see “Error Handling,” page 72.
Sink Bus Error (SnkBusErr) is asserted active high when any of the error conditions
that flags the Sink Bus Error Status bus is triggered. SnkBusErr is triggered
concurrently with SnkBusErrStat.
For each SPI-4.2 protocol violation or error that triggers SnkBusErr or
SnkBurErrStat, these signals will be asserted for at least one RDClk0_GP clock cycle
translated into the SnkFFClk domain.
Sink Training is Valid (SnkTrainValid) is asserted when valid training data is
received. The behavior of this signal is illustrated in the timing diagram in Figure 4-3.
As is shown, the SnkTrainValid signal is driven high for the duration of a complete
training pattern after it has successfully been received.
SnkFifoReset_n is used when you want to clear the FIFO (and the associated data
path logic) while remaining in frame. When SnkFifoReset_n is deasserted, the Sink
data path will not write data into the FIFO until a packet with a valid SOP is received.
Reset_n is used when you want to restart the entire Sink core. It will cause the
interface to go out-of-frame. When Reset_n is deasserted, the Sink core will initiate
the synchronization start-up sequence.
Sink FIFO Interface Signals
The Sink FIFO Interface signals allow you to access the data (received on the SPI-4.2
Interface) that is stored in the FIFO. These signals are defined in Table 2-3. Waveforms
illustrating the handshaking and FIFO status signals are shown in Figure 4-4 and
Figure 4-5. The Sink FIFO Interface signals are synchronous to SnkFFClk, and the FIFO is
510 words deep. A FIFO word is 1/2 credit wide for the 64-bit interface, and 1/4 credit
wide for the 32-bit interface.
Sink FIFO Almost Empty
The behavior of the Almost Empty (SnkFFAlmostEmpty_n) status signal is illustrated in
Figure 4-4. As is shown in this waveform, the Almost Empty flag is asserted with the
second to last word read out of the FIFO. When this signal is asserted (active low), it
indicates that one word remains in the FIFO, and the read enable signal should be
Figure 4-3: Sink Training Valid Status
Training Control Training DataIdle Training Data
Multiple Training
Patterns
SnkFFClk
SnkTrainValid
RdClk
RDat
000F 0FFF F000 F0000FFF