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2-46 GB1400 User Manual
Application Example
GB700/ GB1400 Optical Component Test
Clock Recovery
and
Retiming
Clock
Data
Data
gB-Series Rx
gB-Series Tx
Fiber Optic Link Test Example
Fiber Optic
Clock
A typical BERT application is measuring the error performance of the electrical-
to-optical (E/O) and optical-to-electrical (O/E) output modules of a fiber optic
transmission system, as shown in the diagram above. Not all fiber optic links are
designed for extremely high speed. For example, many data communications
LANs use FDDI at 133 Mb/s. Serial digital video links operate at 270 Mb/s.
External Clock input shown on the BERT Tx would be used to provide jittered
clock to stress Clock Recovery (CR) circuit.
Longer PRBS patterns, such as 2
23
might be used to test DC wander
susceptibility of the CR subsystem.
Peak-to-peak amplitude and level offset of the BERT Tx output may be varied to
determine acceptable operating range for the DUT input circuitry.
Tests may be made using short and long fiber cables to be able to specify
maximum allowable length of fiber runs.
Note that in this application, it may be an advantage to be able to separate the
BERT Tx and Rx. Using the BERT internal PRBS generator makes it easy to
assure that the Tx and Rx have the same data for error comparison.